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Identifier 000357645
Title An EDA tool for the timing analysis, optimization and timing validation of asynchronous circuits
Alternative Title Εργαλείο ΕΔΑ για χρονική ανάλυση, βελτιστοποίηση και χρονικής επικύρωσης ασύγχρονων κυκλωμάτων
Author Κασαπάκη, Ευαγγελία
Thesis advisor Κατεβαίνης, Μανόλης
Abstract Synchronous circuits have enjoyed, since the mid-80's, a constantly maturing EDA tool/flow framework, which enabled the implementation of multi-million transistor chips, and sustains the pace of the electronics industry. The cornerstones of EDA, which triggered its wide adoption are twofold, i.e. Timing Analysis and Timing Analysis-Driven Optimization. Unfortunately, conventional Static Timing Analysis cannot be directly applied to asynchronous circuits, as the latter are closed-loop systems. The primary reason why Asynchronous Design approaches are not attempted today is the lack of any viable and complete EDA flow. This work presents a complete Asynchronous Timing Analysis algorithm implementation, suitable for EDA, which is capable of analyzing the timing of any asynchronous circuit. This work also demonstrates closed-loop Timing Analysis-Driven optimization for asynchronous circuits. The TA algorithm has its foundations in prior theoretical work on algorithms for deriving accurate bounds for the separation time between events of concurrent systems. Several insufficient and incomplete aspects of that work were clarified, completed and improved and a complete and efficient implementation has been achieved. Results on several asynchronous circuits demonstrate the viability of the implemented algorithm, and the capability to automatically optimize selectively the timing-critical subparts of an asynchronous circuit for timing and the other non-timing critical subparts for area.
Language English
Issue date 2008-04-02
Collection   School/Department--School of Sciences and Engineering--Department of Computer Science--Post-graduate theses
  Type of Work--Post-graduate theses
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