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Identifier |
000318807 |
Title |
Gated dual-rail : a methodology for reducing the power consumption of monotonic dual-rail circuits |
Alternative Title |
Κυκλώματα διπλής-ράγας με σήματα φραγής |
Author
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Ματθαιάκης, Παύλος Εμμανουήλ
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Thesis advisor
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Κατεβαίνης, Μανόλης
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Abstract |
Monotonic dual-rail circuits exhibit data-dependent operation and adaptability to P,V,T variations. However, the transformation of a conventional digital circuit to a monotonic dual-rail equivalent incurs both a significant area and a significant power overhead. This work introduces
Gated Dual-Rail circuits, i.e dual-rail circuits with gating signals and an automated design methodology
for their implementation. Gated Dual-Rail circuits present power benefits compared to the conventional dual-rail ones. The automated Gated Dual-Rail methodology operates by firstly
identifying portions of the circuit which do not contribute to any output evaluation for a given subset of primary input vector assignments.
Then, it examines the option to prevent these portions from switching, by using area, timing and gating probability criteria. Based on the results of this analysis, it inserts gating circuitry in order to prevent signal transitions from propagating to the gated circuit portions.
The Gated Dual-Rail methodology has been integrated in the SIS logic synthesis system.
Results of applying this methodology to 22 benchmark circuits of International Workshop for Logic Synthesis have demonstrated that on average dynamic power consumption
has been reduced by 25%.
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Language |
English |
Issue date |
2007-09-11 |
Collection
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School/Department--School of Sciences and Engineering--Department of Computer Science--Post-graduate theses
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Type of Work--Post-graduate theses
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Permanent Link |
https://elocus.lib.uoc.gr//dlib/3/2/9/metadata-dlib-20a2dbc2425e386c5313e601bf15465b_1276240104.tkl
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Views |
514 |