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| Title | Creator | Date | ||
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| 1. | Hardware-assisted security mechanisms for memory vulnerabilities | Χρήστου, Γεώργιος Χ |
2023-12-01 |
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| 2. | Design and implementation of a massively multi-threaded RISC-V processor | Ματζουράνης, Γεώργιος-Μιχαήλ Α. |
2022-12-02 |
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| 3. | Design and implementation of cache coherence engines for RISC-V systems | Τοτόμης Σωτήριος Χ. |
2021-11-26 |
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| 4. | Design and implementation of a scalable IOMMU for RISC-V architectures | Μαστοράκης, Ιάσων Γ. |
2021-07-30 |
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| 5. | Design-space exploration of FPGA architectures for efficient HPC acceleration | Γιαουρτάς, Μιχαήλ Π. |
2020-03-27 |
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Page: [1] |
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