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| Identifier |
000425808 |
| Title |
Handling of memory page faults during virtual-address RDMA |
| Alternative Title |
Χειρισμός των σφαλμάτων σελίδας μνήμης στη διάρκεια άμεσων απομακρυσμένων προσβάσεων μνήμης με εικονικές διευθύνσεις |
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Author
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Ψιστάκης, Αντώνιος Γ.
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Thesis advisor
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Κατεβαίνης Μανώλης
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Reviewer
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Μπίλας, Άγγελος
Αργυρός, Αντώνιος
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| Abstract |
Nowadays, avoiding system calls during cluster communication (e.g. in Data Centers, High
Performance Computing etc) in modern high-speed interconnection networks comes as
a necessity, due to the high overhead of the multiple copies (kernel-to-user and user-tokernel). User-level zero-copy Remote Direct Memory Access (RDMA) technologies
overcome this problem and, as a result, increase the performance and reduce the energy
consumption of the system. Common RDMA Engines like these cannot tolerate page
faults caused by them and choose different ways to circumvent them.
The state-of-the-art RDMA techniques usually include pinning address spaces or multiple
pages per application. This approach has some disadvantages in the long run, as a
consequence of the complexity induced in the programming model (pinning/unpinning
buffers), the limit of bytes that an application is allowed to pin and the overall memory
utilization. Furthermore, pinning does not guarantee that someone will not experience
any page faults, due to internal optimization mechanisms, such as Transparent Huge
Pages (THP), which is enabled by default in modern Linux operating systems.
This thesis implements a page fault handling mechanism in association with the DMA
Engine of the ExaNeSt project. First, the fault is detected by the fault handler of the ARM
System Memory Management Unit (SMMU). Then, our hardware-software solution
resolves the fault. Finally, a retransmission is requested by the mechanism, if needed. In
our system, this mechanism required modifications to the Linux driver of the SMMU, a
new library in software, alterations to the hardware of the DMA engine and adjustments
to the scheduler of the DMA transfers. Our tests were run on the Quad-FPGA Daughter
Board (QFDB) of ExaNeSt, which contains Xilinx Zynq UltraScale+ MPSoCs.
We evaluate our mechanism and we compare against alternatives such as pinning or “prefaulting” pages, and we discuss the merits of our approach.
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| Language |
English |
| Subject |
Απομακρυσμένες προσβάσεις μνήμης με εικονικές διευθύνσεις |
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Σφάλματα σελίδας μνήμης |
| Issue date |
2019-11-22 |
| Collection
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School/Department--School of Sciences and Engineering--Department of Computer Science--Post-graduate theses
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Type of Work--Post-graduate theses
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| Permanent Link |
https://elocus.lib.uoc.gr//dlib/e/2/6/metadata-dlib-1573572763-204453-13005.tkl
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| Views |
519 |
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